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| author | janczer <menshikov.ivn@gmail.com> | 2018-02-07 09:18:59 +0100 |
|---|---|---|
| committer | janczer <menshikov.ivn@gmail.com> | 2018-02-07 09:21:24 +0100 |
| commit | 661d234c3c8662423ee12e248c30e7d0e1dae78a (patch) | |
| tree | 1cb6afe425e354b848ae96d0cc4b64847b7b6361 /components/servo_arc/lib.rs | |
| parent | 2cf0077be130cec4499d8e3df6e09c340022b67f (diff) | |
| download | servo-661d234c3c8662423ee12e248c30e7d0e1dae78a.tar.gz servo-661d234c3c8662423ee12e248c30e7d0e1dae78a.zip | |
Change debug assertions to specific ones
Diffstat (limited to 'components/servo_arc/lib.rs')
| -rw-r--r-- | components/servo_arc/lib.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/components/servo_arc/lib.rs b/components/servo_arc/lib.rs index eff21f01019..0189e214f3b 100644 --- a/components/servo_arc/lib.rs +++ b/components/servo_arc/lib.rs @@ -598,7 +598,7 @@ impl<H, T> Arc<HeaderSlice<H, [T]>> { assert!(items.next().is_none(), "ExactSizeIterator under-reported length"); // We should have consumed the buffer exactly. - debug_assert!(current as *mut u8 == buffer.offset(size as isize)); + debug_assert_eq!(current as *mut u8, buffer.offset(size as isize)); } // Return the fat Arc. |